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AN30181A 1 ver. beb z high-speed response dc-dc step-down regulator circuit that employs hysteretic control system : 2-ch (1.2 v, 0.8 a / 1.8 v, 0.8 a) z ldo : 1-ch (0.9 v, 10 ma) z built-in external pch mosfet gate drive circuits z built-in reset function z built-in under voltage lockout function (uvlo) z 24pin plastic quad flat non-leaded package (size : 4 4 mm, 0.5 mm pitch) vin = 2.9v to 5.5v 2ch,0.8a general-purpose high efficiency power lsi AN30181A is a power management lsi which has dc-dc step down regulators (2-ch) that employs hysteretic control system. by this system, when load current changes suddenly, it responds at high speed and minimizes the changes of output voltage. since it is possible to use capacitors with small capacitance and it is unnecessary to use parts for phase compensation, this ic realizes downsizing of set and reducing in the number of external parts. output voltages are 1.2 v and 1.8 v. each maximum current is 0.8 a. this lsi has a ldo circuit, external pch-mosfet gate drive circuits and a reset circuit of input power supply voltage. 50 55 60 65 70 75 80 85 90 95 100 1 10 100 1000 load current [ma] efficiency [%] 40 45 50 55 60 65 70 75 80 85 90 1 10 100 1000 load current [ma] efficiency [%] vin=5.0v vin=3.3v vin=5.0v vin=3.3v features description high current distributed power systems such as ssd (solid state drive), cellular phone, etc. applications notes) this application circuit is an example. the operation of mass production set is not guaranteed. you should perform enough evaluation and verification on the design of mass production set. you are fully responsible for the incorporation of the above application circuit and information in the design of your equipment. simplified application condition : v in =3.3v , 5.0v , vout=1.8v , cout=10 f , lout=2.2 h condition : v in =3.3v , 5.0v , vout=1.2v , cout=10 f , lout=2.2 h [dc-dc1] [dc-dc2] vreg en pcnb dis fb2 lx2 pgnd2 pgnd1 pvin1 avin vout2 3.3v pvin1 AN30181A avin pvin2 pvin2 agnd2 agnd1 reset fb1 lx1 vout1 pcnt 3.3v buf 4.7 f 4.7 f 4.7 f 1.0 f 1.0 f 10 f 10 f 2.2 h 2.2 h 10 k efficiency curve publication date: october 2012
AN30181A 2 ver. beb absolute maximum ratings *1 *3 v ? 0.3 to (v in + 0.3) lx1,lx2,pcnt,pcntb,dis, reset,buf,vreg output voltage range *1 *3 v ? 0.3 to (v in + 0.3) en,fb1,fb2 input voltage range - kv 2 hbm (human body model) *2 c ? 40 to + 150 t j operating junction temperature esd *2 c ? 55 to + 150 t stg storage temperature notes unit rating symbol parameter *2 c ? 40 to + 85 t opr operating free-air temperature *1 *3 v 6.0 v in supply voltage notes) do not apply external currents and voltages to any pin not specifically mentioned. this product may sustain permanent damage if subjected to conditions higher than the above stated absolute maximum rating. this rating is the maximum rating and device operating at this range is not guaranteeable as it is higher than our stated recommended operating range. when subjected under the absolute maximum rating for a long time, the reliability of the product may be affected. *1:the values under the condition not exceeding the above absolute maximum ratings and the power dissipation. *2:except for the power dissipation, operating ambient temperature, and storage temperature, all ratings are for ta = 25 c. *3:v in is voltage for avin, pvin1 = pvin2,(v in + 0.3) v must not be exceeded 6 v. power dissipation rating *1 notes 0.765 w 1.472 w 84.9 c /w 9pin wafer level chip size package (wlcsp type) pd(ta=85 c) pd(ta=25 c) ja package note). for the actual usage, please refer to the pd-ta characteristics diagram in the package specification, follow the power s upply voltage, load and ambient temperature conditions to ensure that there is enough margin and the thermal design does not exceed the allowable value. *1:glass epoxy substrate(4 layers) [glass-epoxy: 50 x 50 x 0.8t(mm)] die pad exposed , soldered. caution although this has limited built-in esd protection circuit, but permanent damage may occur on it. therefore, proper esd precautions are recommended to avoid electrostatic damage to the mos gates
AN30181A 3 ver. beb recommended operating conditions *3 v v in + 0.3 ? ?0.3 pcntb *3 v v in + 0.3 ? ?0.3 vreg *3 v v in + 0.3 ? ?0.3 buf output voltage range *3 v v in + 0.3 ? ?0.3 lx1,lx2 *3 v v in + 0.3 ? ?0.3 pcnt *3 v v in + 0.3 ? ?0.3 dis *3 v v in + 0.3 ? ?0.3 reset *3 v v in + 0.3 ? ?0.3 fb2 *3 v v in + 0.3 ? ?0.3 fb1 *3 v v in + 0.3 ? ?0.3 en input voltage range 3.3 typ. 5.5 max. notes unit min. symbol parameter *1 *2 v 2.9 v in supply voltage range note) do not apply external currents and voltages to any pin not specifically mentioned. voltage values, unless otherwise specified, are with respect to gnd. gnd is voltage for agnd1, agnd2, pgnd1, pgnd2. agnd1 = agnd2 = pgnd1 = pgnd2. vin is voltage for avin, pvin1, pvin2. avin = pvin1 = pvin2. *1 : please set the rising time of power input pin to the following range. in addition, please input the voltage with the rising time which has margin enough in consideration of the variation in external parts. *2 : the values under the condition not exceeding the above absolute maximum ratings and the power dissipation. *3 : (v in + 0.3) v must not be exceeded 6 v. 0 v 100 s < tr < 1.5 ms (tr is the rise time from 0 v to the setup voltage of v in .)
AN30181A 4 ver. beb ? 190 90 ? en = 0 v ron dis dis discharge resistance ? 240 140 ? en = 0 v reset inflowing current = 330 a (10 k pull-up resistor to 3.3 v) ron rst reset on resistance ? v 2.993 2.920 2.847 v in = 0 v 3.3 v vrst rmv reset cancel voltage ? v 2.880 2.810 2.740 v in = 3.3 v 0 v vrst det reset detection voltage ? v 2.8 2.6 2.45 v in = 0 v 3.3 v vuvlo rmv uvlo stop voltage ? v 2.6 2.5 2.4 v in = 3.3 v 0 v vuvlo det uvlo start voltage ? v 1.836 1.800 1.764 i out2 = 500 ma dd2 vout dc-dc2 output voltage ? v 1.224 1.200 1.176 i out1 = 450 ma dd1 vout dc-dc1 output voltage ? a 10 2.4 ? en = 3.3 v ileak en en pin leak current ? v - 3.3 1.5 v in = 3.3 v venh en pin high-level input voltage [dc-dc1] (1.2 v step-down dcdc step down regulator) [dc-dc2] (1.8 v step-down dcdc step down regulator) ? v 0.3 0 ? v in = 3.3 v venl en pin low-level input voltage ? v 0.927 0.900 0.873 i out(buf) = 10 a buf vout buf output voltage ? a 300 200 ? en = 3.3 v, i out1 , i out2 , i out(buf) = 0 a iact consumption current at active limits typ unit max notes min conditions symbol parameter electrical characteristics v in = avin = pvin1 = pvin2 = 3.3v [dc-dc1] cout = 10 f (grm21bb31a106k[murat a] ) , lout = 2.2 h ( nr3012t2r2m[taiyo yuden] ) [dc-dc2] cout = 10 f (grm21bb31a106k[murat a] ) , lout = 2.2 h ( nr3012t2r2m[taiyo yuden] ) t a = 25 c 2 c unless otherwise noted.
AN30181A 5 ver. beb *1 mv[p-p] ? 7 ? i out2 = 500 ma dd2 vrpl2 dc-dc2 output ripple voltage 2 *1 mv[p-p] ? 30 ? i out2 = 10 ma dd2 vrpl1 dc-dc2 output ripple voltage 1 *1 mv[p-p] ? 30 ? i out1 = 10 ma dd1 vrpl1 dc-dc1 output ripple voltage 1 *1 mv[p-p] ? 7 ? i out1 = 450 ma dd1 vrpl2 dc-dc1 output ripple voltage 2 *1 % ? 85 ? v in = 3.3 v i out2 = 500 ma dd2 eff2 dc-dc2 efficiency 2 *1 % ? 80 ? v in = 3.3 v 5 v i out2 = 10 ma dd2 eff1 dc-dc2 efficiency 1 *1 % ? 80 ? v in = 5 v i out1 = 450 ma dd1 eff3 dc-dc1 efficiency 3 *1 % ? 83 ? v in = 3.3 v i out1 = 450 ma dd1 eff2 dc-dc1 efficiency 2 *1 % ? 75 ? v in = 3.3 v 5 v i out1 = 10 ma dd1 eff1 dc-dc1 efficiency 1 *1 a ? 1.6 ? fb2 = 1.8 v 0.9 v dd2 ilmt dc-dc2 output current limit *1 a ? 1.6 ? fb1 = 1.2 v 0.6 v dd1 ilmt dc-dc1 output current limit *1 mv ? 15 ? i out2 = 10 a 800 ma dd2 regld dc-dc2 load regulation *1 mv ? 10 ? i out1 = 10 a 800 ma dd1 regld dc-dc1 load regulation *1 mv ? 8 ? v in = 2.9 v 5.5 v i out2 = 500 ma dd2 regin dc-dc2 line regulation [dc-dc1] (1.2 v step-down dcdc step down regulator) [dc-dc2] (1.8 v step-down dcdc step down regulator) *1 mv ? 6 ? v in = 2.9 v 5.5 v i out1 = 450 ma dd1 regin dc-dc1 line regulation *1 % ? 81 ? v in = 5 v i out2 = 500 ma dd2 eff3 dc-dc2 efficiency 3 *1 a ? 0 ? en = 0 v istb consumption current at standby reference values typ unit max notes min conditions symbol parameter elecrtrical characteristics (continued) v in = avin = pvin1 = pvin2 = 3.3v [dc-dc1] cout = 10 f (grm21bb31a106k[murat a] ) , lout = 2.2 h ( nr3012t2r2m[taiyo yuden] ) [dc-dc2] cout = 10 f (grm21bb31a106k[murat a] ) , lout = 2.2 h ( nr3012t2r2m[taiyo yuden] ) t a = 25 c 2 c unless otherwise noted. *1 typical value checked by design.
AN30181A 6 ver. beb *1 ms ? 0.15 ? capacitive load : 24 f i out2 = 0 a the time until 90 % from 10 % of target value. dd2 tstu dc-dc2 start time *1 ms ? 0.1 ? capacitive load : 26 f i out1 = 0 a the time until 90 % from 10 % of target value. dd1 tstu dc-dc1 start time *1 ? 0.25 ? ? dd2 ronn dc-dc2 nch-mos on resistance *1 ? 0.2 ? ? dd1 ronn dc-dc1 nch-mos on resistance *1 ? 0.3 ? ? dd2 ronp dc-dc2 pch-mos on resistance *1 ? 0.25 ? ? dd1 ronp dc-dc1 pch-mos on resistance *1 ? 150 ? en = 0 v dd2 rdis dc-dc2 discharge resistance *1 ? 100 ? en = 0 v dd1 rdis dc-dc1 discharge resistance *1 mhz ? 1.2 ? i out2 = 500 ma dd2 fsw dc-dc2 operating frequency *1 mhz ? 1.2 ? i out1 = 450 ma dd1 fsw dc-dc1 operating frequency [dc-dc1] (1.2 v step-down dcdc step down regulator) [dc-dc2] (1.8 v step-down dcdc step down regulator) *1 mv ? 25 ? i out2 = 10 ma ? 250 ma t = 1 s dd2 dvac dc-dc2 load transient response *1 mv ? 25 ? i out1 = 50 ma ? 200 ma t = 1 s dd1 dvac dc-dc1 load transient response reference values typ unit max notes min conditions symbol parameter elecrtrical characteristics (continued) v in = avin = pvin1 = pvin2 = 3.3v [dc-dc1] cout = 10 f (grm21bb31a106k[murat a] ) , lout = 2.2 h ( nr3012t2r2m[taiyo yuden] ) [dc-dc2] cout = 10 f (grm21bb31a106k[murat a] ) , lout = 2.2 h ( nr3012t2r2m[taiyo yuden] ) t a = 25 c 2 c unless otherwise noted. *1 typical value checked by design.
AN30181A 7 ver. beb *1 v ? 0.9 ? fb2 = 1.8 v 0 v dd2 scp dc-dc2 ground-short detection voltage *1 c ? 160 ? temperature error detection tjso tsd operating temperature *1 v ? 0.6 ? fb1 = 1.2 v 0 v dd1 scp dc-dc1 ground-short detection voltage *1 ms ? 1 ? ? tlat ch timer latch time *1 a ? 2.5 ? pcnt = 3.3 v ipcnt pcnt sink current *1 ms ? 30 ? ? rst dly reset delay *1 s ? 50 ? i out(buf) = 0 a the time until 90 % from 10 % of target value. buf tstu buf start time *1 ? 80 ? en = 0 v buf rdis buf discharge resistance *1 mv ? 100 ? i out(buf) = 10 ma 10 a t = 1 s buf dvac 2 buf load transient response 2 *1 mv ? 160 ? i out(buf) = 10 a 10 ma t = 1 s buf dvac 1 buf load transient response 1 *1 db ? ?50 ? i out(buf) = 10 a f = 10 khz buf psr buf psrr *1 ma ? 10 ? buf = 0 v buf ilmt bud output current limit [dc-dc1] (1.2 v step-down dcdc step down regulator) [dc-dc2] (1.8 v step-down dcdc step down regulator) *1 mv ? 5 ? i out(buf) = 10 a 10 ma buf reg ld buf load regulation *1 mv ? 0 ? v in = 2.9 v 5.5 v i out(buf) = 10 a buf reg in buf line regulation reference values typ unit max notes min conditions symbol parameter elecrtrical characteristics (continued) v in = avin = pvin1 = pvin2 = 3.3v [dc-dc1] cout = 10 f (grm21bb31a106k[murat a] ) , lout = 2.2 h ( nr3012t2r2m[taiyo yuden] ) [dc-dc2] cout = 10 f (grm21bb31a106k[murat a] ) , lout = 2.2 h ( nr3012t2r2m[taiyo yuden] ) t a = 25 c 2 c unless otherwise noted. *1 typical value checked by design.
AN30181A 8 ver. beb on/off control pin input en 1 feed back pin ( for dc-dc2 ) input fb2 2 ground pin ground agnd2 3 external devices control output pin output pcntb 4 discharge pin ( open drain ) output dis 5 external pch mosfet gate control pin output pcnt 6 power supply pin ( for dc-dc1 ) power supply pvin1 7 power supply pin ( for dc-dc1 ) power supply pvin1 8 driver output pin ( for dc-dc1 ) output lx1 9 driver output pin ( for dc-dc1 ) output lx1 10 ground pin ( for dc-dc1 ) ground pgnd1 11 ground pin ( for dc-dc1 ) ground pgnd1 12 reset output pin ( open drain ) output reset 13 feed back pin ( for dc-dc1 ) input fb1 14 ground pin ground agnd1 15 ldo output pin ( power supply for internal control circuit / 2.55 v ) output vreg 16 power supply pin power supply avin 17 ldo output pin ( 0.9 v ) output buf 18 power supply pin ( for dc-dc2 ) power supply pvin2 19 power supply pin ( for dc-dc2 ) power supply pvin2 20 driver output pin ( for dc-dc2 ) output lx2 21 driver output pin ( for dc-dc2 ) output lx2 22 ground pin ( for dc-dc2 ) ground pgnd2 23 ground pin ( for dc-dc2 ) ground pgnd2 24 description type pin name pin no. pin configuration pin function top view 16 7 10 12 13 18 19 20 24 21 22 23 17 16 15 14 11 8 9 5 4 3 2 pgnd2 pgnd2 lx2 lx2 pvin2 pvin2 buf avin vreg agnd1 fb1 reset pgnd1 pgnd1 lx1 lx1 pvin1 pvin1 pcnt dis pcntb agnd2 fb2 en notes) concerning detail about pin description, please refer to operation and application information section.
AN30181A 9 ver. beb 17 : avin 13 : reset 1 : en uvlo reset bgr vreg 16 : vreg 3.75 ms delay driver control logic ocp 7,8 : pvin1 9,10 : lx1 11,12 : pgnd1 14 : fb1 19,20 : pvin2 21, 22 : lx2 23,24 : pgnd2 2 : fb2 3.75 ms delay enable enable tsd enable enc 4 : pcntb 5 : dis 6 : pcnt enable pcnt 1.24 v shp dc-dc1 (1.2 v, 800 ma) dc-dc2 (1.8 v, 800 ma) osc 15 : agnd1 3 : agnd2 driver control logic ocp shp buf 18 : buf 1 ms delay functional block diagram notes) this block diagram is for explaining functions. part of the block diagram may be omitted, or it may be simplified.
AN30181A 10 ver. beb operation buf(0.9v) dc-dc2(1.8v) external pch-mosfe gate control circuit off on off on off on dc-dc1(1.0v) off on low high en 1. pin setting for start / stop control
AN30181A 11 ver. beb start / stop control of AN30181A is performed by en pin. v in en uvlo reset fb1 pcnt dis (3.3 v line) pcntb fb2 buf 30 ms 1.2 v terminated with a resistor 3.75 ms constant current discharge (2.5 a) v in v in v in 3.3 v 7.5 ms 8.5 ms 1.8 v 0.9 v 100 s 300 s 150 s 50 s note) all values given in the above figure are typical values. 3.75 ms terminated with a resistor terminated with a resistor terminated with a resistor terminated at a resistor operation (continued) 2. start / stop control timing chart note) the characteristics listed below are reference values derived from the design of the ic and are not guaranteed.
AN30181A 12 ver. beb start / stop sequence in case that en pin is connected to power supply (vin) is as follows. 2.5 v 2.6 v 2.81 v 2.92 v v in en uvlo reset fb1 pcnt dis (3.3 v line) pcntb fb2 buf 30 ms 1.2 v 3.75 ms v in v in v in 3.3 v 7.5 ms 8.5 ms 1.8 v 0.9 v 100 s 300 s 150 s 50 s 3.75 ms voltage which recognized that en is low-level. natural discharge constant current discharge (2.5 a) terminated with a resistor terminated with a resistor terminated with a resistor terminated with a resistor natural discharge natural discharge note) all values given in the above figure are typical values. operation (continued) 2. start / stop control timing chart note) the characteristics listed below are reference values derived from the design of the ic and are not guaranteed.
AN30181A 13 ver. beb ? uvlo function when power supply rises to 2.6 v or higher at en = hi gh, uvlo is released, and the operation of each function starts.since this function?s hysteresis is 100 mv, uvlo detects when power supply falls to 2.5 v or lower, then each function shuts down. ? reset function reset pin shifts to high at 30 ms delay after power supply rises to 2.92 v or higher. (output type : nch mos open drain) since this function's hysteresis is 110 mv, reset pin shi fts to low when power supply falls to 2.81 v or lower. (no delay in case of high low) ? dc-dc1 (output voltage : 1.2 v) when uvlo is released, dc-dc1 starts and outputs 1.2 v. soft-start function operates for 1 ms after startup. since output voltage rises slowly, limiting input current, it is possible to prevent rush current and overshoot. when uvlo detects, dcpdc1 turns off. when en pin sh ifts to low, an output pin (fb1) is terminated with a resistor. ? external pch-mosfet gate control function pcnt pin is discharged by the constant current (2.5 a) at 3.75 ms delay after uvlo is released. by connecting the gate of pch mosfet to pcnt pi n, it is possible to turn on this fet softly. at the same time, the termination with a resistor of dis pin is released. just after uvlo detects, pcnt pin voltage becomes v in and dis pin is terminated with a resistor. ? external synchronization signal output function pcntb pin outputs the signal which synchronized with the above-mentioned pcnt pin. therefore, pcntb pin outputs high at 3.75 ms delay after uvlo is releas ed. pcntb pin outputs low ju st after uvlo detects. ? dc-dc2 (output voltage : 1.8 v) dc-dc2 starts and outputs 1.8 v at 7. 5 ms delay after uvlo is releas ed. dc-dc2 has the same soft-start function as dc-dc1 and starts, prev enting rush current and overshoot. dc-dc2 stops because uvlo detects. when en pin sh ifts to low, an output pin (fb2) is terminated with a resistor. ? buf (output voltage : 0.9 v) buf pin outputs 0.9 v at 8.5 ms delay after uvlo is released. buf starts, preventing rush current and overshoot. buf stops because uvlo detects. buf is terminated with a resistor when en pin shifts to low. operation (continued) 3. protection note) the characteristics listed below are reference values derived from the design of the ic and are not guaranteed.
AN30181A 14 ver. beb ground-short protection function dc-dc1 and dc-dc2 have ground-short detection circuits re spectively. when output voltage falls to 50% or lower of target value (dc-dc1 : 0.6 v, dc-dc2 : 0.9 v), it shi fts to the protection sequence shown in [3.protection]. however, even if buf pin shorts to gnd, buf does not shift to the protection sequence. over-current limit function dc-dc1, dc-dc2 and buf have over-current limit circuits re spectively. this function lim its the output current which exceeds the setup value. the over-current limit characteristics are as follows. a) dc-dc1/2 output current output voltage 1.6a(typ) v o ?v o 0 b) buf output current output voltage 0.9 v 0 the output currents of dc-dc1 and dc- dc2 are limited to 1.6 a(typ) re gardless of the output voltage. buf has limit characteristics, which the output current decreases as the output voltage falls. the peak input current is 40 ma(typ). the input current at buf = 0 v is 10 ma(typ). v o = 1.2 v(dc-dc1), 1.8 v(dc-dc2) ground-short detection level 40 ma 10 ma operation (continued) 3. protection 0.8a to 2.0 a note) the characteristics listed below are reference values derived from the design of the ic and are not guaranteed.
AN30181A 15 ver. beb protection sequence when the following state continues for 1 ms(typ), AN30181A shifts to the protection sequence. ? any of dcdc1 and dcdc2 shorts to gnd. (output voltage is 50% or lower of target value.) ? tsd circuit detects abnormal state. when this lsi shifts to the protection sequence, it is la tched to the state at which each function is shut down. it recovers from the protection sequence by appl ying to en pin again or releasing uvlo again. the protection sequence example is as follows. en reset fb1 pcnt dis (3.3 v line) pcntb fb2 buf 0.6 v v in 3.3 v 1.8 v < 1 ms 1.2 v 1 ms ground-short cancel 3.75 ms 7.5 ms 8.5 ms 30 ms normal operation protection operation timer latch normal operation (start sequence) (d) (a) (b) (c) ground-short release operation (continued) 3. protection note) the characteristics listed below are reference values derived from the design of the ic and are not guaranteed. 1 ms in (a) of the following figure, dcdc1 output shorts to gnd. however, this lsi doesn' t shift to protection sequence because the term of ground-short is 1 ms or shorter. in (b) of the following figure, dcdc2 output shorts to gnd. after ground-short state continues for 1 ms, this lsi shifts to protection sequence, dcdc1, dcdc2, external pch-mosfet gate drive circuits and buf shift to off state , and buf shifts to off stat e after another 1 ms and are latched. even if ground-short is released, the operat ion of each circuit does not recover (c). during the protection sequence, reset pin is not set to low. in (d) of the following figure, they recover to normal start sequence after en is input again.
AN30181A 16 ver. beb vreg pin ground-short operation vreg pin is an output pin of ldo used in internal circuits . the operation of each function stops just after vreg pin is shorted to gnd. since each functi on is not latched unlike the case of [3.protection : protection sequence], it recovers by the release of ground-short. the operation is as follows. reset fb1 pcnt dis (3.3 v line) pcntb fb2 buf v in 3.3 v 1.8 v 1.2 v 3.75 ms 7.5 ms 8.5 ms 30 ms vreg 2.55 v 2.1 v ground-short normal operation normal operation (start sequence) off state ground-short release operation (continued) 3. protection note) the characteristics listed below are reference values derived from the design of the ic and are not guaranteed.
AN30181A 17 ver. beb (1) output ripple voltage vin = 3.3 v , cout = 10 f ( grm21bb31a106k[murata] ) , lout = 2.2 h ( nr3012t2r2m[taiyo yuden] ) dc-dc1 iout1 = 10 ma dc-dc2 iout2 = 10 ma lx1 vout1 lx2 vout2 dc-dc1 iout1 = 450 ma dc-dc2 iout2 = 500 ma lx1 vout1 lx2 vout2 typical characteristics curves
AN30181A 18 ver. beb (1) output ripple voltage vin = 5.0 v , cout = 10 f ( grm21bb31a106k[murata] ) , lout = 2.2 h ( nr3012t2r2m[taiyo yuden] ) dc-dc1 iout1 = 10 ma dc-dc2 iout2 = 10 ma lx1 vout1 lx2 vout2 dc-dc1 iout1 = 450 ma dc-dc2 iout2 = 500 ma lx1 vout1 lx2 vout2 typical characteristics curves (continued)
AN30181A 19 ver. beb (2) load transient response vin = 3.3 v , cout = 10 f ( grm21bb31a106k[murata] ) , lout = 2.2 h ( nr3012t2r2m[taiyo yuden] ) dc-dc1 iout1 = 50 ma to 200 ma , t = 1 sec dc-dc2 iout2 = 10 ma to 250 ma , t = 1 sec lx1 vout1 lx2 vout2 dc-dc1 iout1 = 200 ma to 50 ma , t = 1 sec dc-dc2 iout2 = 250 ma to 10 ma , t = 1 sec iout1 vout1 iout2 vout2 iout1 iout2 lx1 lx2 typical characteristics curves (continued)
AN30181A 20 ver. beb (2) load transient response vin = 5.0 v , cout = 10 f ( grm21bb31a106k[murata] ) , lout = 2.2 h ( nr3012t2r2m[taiyo yuden] ) dc-dc1 iout1 = 50 ma to 200 ma , t = 1 sec dc-dc2 iout2 = 10 ma to 250 ma , t = 1 sec lx1 vout1 lx2 vout2 dc-dc1 iout1 = 200 ma to 50 ma , t = 1 sec dc-dc2 iout2 = 250 ma to 10 ma , t = 1 sec iout1 vout1 iout2 vout2 iout1 iout2 lx1 lx2 typical characteristics curves (continued)
AN30181A 21 ver. beb (3) efficiency vin = 3.3 v or 5.0 v , cout = 10 f ( grm21bb31a106k[murata] ) , lout = 2.2 h ( nr3012t2r2m[taiyo yuden] ) 1.6 1.65 1.7 1.75 1.8 1.85 1.9 1.95 2 0 100 200 300 400 500 600 700 800 load current [ma] output voltage [v] 1 1.05 1.1 1.15 1.2 1.25 1.3 1.35 1.4 0 100 200 300 400 500 600 700 800 load current [ma] output voltage [v] 40 45 50 55 60 65 70 75 80 85 90 1 10 100 1000 load current [ma] efficiency [%] 50 55 60 65 70 75 80 85 90 95 100 1 10 100 1000 load current [ma] efficiency [%] dc-dc1 dc-dc2 dc-dc1 dc-dc2 (4) load regulation vin = 3.3 v or 5.0 v , cout = 10 f ( grm21bb31a106k[murata] ) , lout = 2.2 h ( nr3012t2r2m[taiyo yuden] ) dc-dc1 dc-dc2 (5) line regulation cout = 10 f ( grm21bb31a106k[murata] ) , lout = 2.2 h ( nr3012t2r2m[taiyo yuden] ) 1.6 1.65 1.7 1.75 1.8 1.85 1.9 1.95 2 2.533.544.555.56 input voltage [v] output voltage [v] 1 1.05 1.1 1.15 1.2 1.25 1.3 1.35 1.4 2.533.544.555.56 input voltage [v] output voltage [v] vin=5.0v vin=3.3v vin=5.0v vin=3.3v vin=5.0v vin=3.3v vin=5.0v vin=3.3v iload =450ma iload =500ma typical characteristics curves (continued)
AN30181A 22 ver. beb applications information 1. application circuit figure : top layer with silk screen ( top view ) with evaluation board figure : bottom layer with silk screen ( bottom view )with evaluation board 2. layout of evaluation board vreg en pcnb dis fb2 lx2 pgnd2 pgnd1 pvin1 avin vout2 3.3v pvin1 AN30181A avin pvin2 pvin2 agnd2 agnd1 reset fb1 lx1 vout1 pcnt 3.3v buf c-pvin1 c-pvin2 c-avin r-rst c-vreg c-buf c-out2 c-out1 l-out2 l-out1 u1 notes) this application circuit and layout is an example. the opera tion of mass production set is not guaranteed. you should perform enough evaluation and verification on the design of mass production set. you are fully responsible for the incorporation of the above application circuit and information in the design of your equipment.
AN30181A 23 ver. beb applications information (continued) 3. recommended component nr3012t2r2m taiyo yuden 2.2 h 1 l-out2 grm21bb31a106ke18l murata 10 f 1 c-vout2 grm155b31a105ke15d murata 1 f 1 c-buf grm21bb31a475ka74l murata 4.7 f 1 c-pvin2 era3arw103v panasonic 10 k 1 r-rst mtm76111 panasonic ? 1 u1 grm21bb31a475ka74l murata 4.7 f 1 c-pvin1 grm21bb31a106ke18l murata 10 f 1 c-vout1 nr3012t2r2m taiyo yuden 2.2 h 1 l-out1 grm155b31a105ke15d murata 1 f 1 c-vreg grm21bb31a475ka74l murata 4.7 f 1 cavin value qty part number manufacturer reference designator
AN30181A 24 ver. beb package information (reference data) unit:mm lead finish method : au plating lead material : cu alloy body material : package code : hqfn024-p-0404 br / sb free epoxy resin
AN30181A 25 ver. beb important notice 1.the products and product specificat ions described in this book are subject to change without notice for modification and/or improvement. at the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date product standards in advance to ma ke sure that the latest specifications satisfy your requirements. 2.when using the lsi for new models, verify the safe ty including the long-term reliability for each product. 3.when the application system is designed by using this lsi, be sure to confirm notes in this book. be sure to read the notes to descr iptions and the usage notes in the book. 4.the technical information described in this book is inten ded only to show the main characteristics and application circuit examples of the products. no license is granted in and to any intellectual property right or other right owned by panasonic corporation or any other company. therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information de-scribed in this book. 5.this book may be not reprinted or r eproduced whether wholly or partially, without the prior written permission of our company. 6.this lsi is intended to be used for general electronic equipment. consult our sales staff in advance for information on the following applications: special applications in which exceptional quality and reliability are required, or if the failu re or malfunction of this lsi may directly jeopardize life or harm the human body. any applications other than t he standard applications intended. (1) space appliance (such as artificial satellite, and rocket) (2) traffic control equipment (such as fo r automobile, airplane, train, and ship) (3) medical equipment for life support (4) submarine transponder (5) control equipment for power plant (6) disaster prevention and security device (7) weapon (8) others : applications of which reliabili ty equivalent to (1) to (7) is required it is to be understood that our company sh all not be held responsible for any damage incurred as a result of or in connection with your using the lsi described in this book for any special application, unless our company agrees to your using the lsi in this book for any special application. 7.this lsi is neither designed nor intended for use in aut omotive applications or envir onments unless the specific product is designated by our company as comp liant with the iso/ts 16949 requirements. our company shall not be held responsible for any damage incurred by you or any third party as a result of or in connection with your using the lsi in aut omotive application, unless our compan y agrees to your using the lsi in this book for such application. 8.if any of the products or technical in formation described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially , those with regard to security export control, must be observed. 9. please use this product in compliance with all applicable la ws and regulations that regula te the inclusion or use of controlled substances, including withou t limitation, the eu rohs directive. our company shall not be held responsible for any dama ge incurred as a result of your using the lsi not complying with the applicable laws and regulations.
AN30181A 26 ver. beb usage notes 1. when designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc. ). especially, please be careful not to exceed the range of absolute maximum rati ng on the transient state, such as power-on, power-off and mode-switching. otherwise, we will not be liable for any defect which may arise later in your equipment. even when the products are used within the guaranteed val ues, take into the consideration of incidence of break down and failure mode, possible to occur to semi conductor products. measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are reco mmended in order to prevent physical injury, fire, social damages, for example, by using the products. 2. comply with the instructions for use in order to pr event breakdown and characteristics change due to external factors (esd, eos, thermal stress and mechanical stress) at the time of handling, mo unting or at customer's process. when using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages. 3. pay attention to the direction of lsi. when mounting it in the wrong directi on onto the pcb (printed-circuit-board), it might smoke or ignite. 4. pay attention in the pcb (printed-circuit-board) pattern layout in order to prevent damage due to short circuit between pins. in addition, refer to the pin description for the pin configuration. 5. perform a visual inspection on the pcb before applying power, otherwise damage might happen due to problems such as a solder-bridge between the pins of t he semiconductor device. also, perform a full technical verification on the assembly quality, because the same damage possibly can happen due to conductive substances, such as solder ball, that adhere to the lsi during transportation. 6. take notice in the use of this pr oduct that it might break or occasionally smoke when an abnormal state occurs such as output pin-vcc short (power supply fault), out put pin-gnd short (ground faul t), or output-to-output-pin short (load short) . and, safety measures such as an installation of fuses are recommended becaus e the extent of the above- mentioned damage and smoke emission will depend on the current capability of the power supply. 7. the protection circuit is for maintaining safety agai nst abnormal operation. theref ore, the protection circuit should not work during normal operation. especially for the thermal protection ci rcuit, if the area of safe operation or the absolute maximum rating is momentarily exceeded due to output pin to vcc short (pow er supply fault), or output pin to gnd short (ground fault), the lsi might be damaged before t he thermal protection circuit could operate. 8. unless specified in the product specifications, make sure that negative voltage or excessive voltage are not applied to the pins because the device might be damage d, which could happen due to negative voltage or excessive voltage generated during the on and off timing when the inductive load of a motor coil or actuator coils of optical pick-up is being driven. 9. the product which has spec ified aso (area of safe oper ation) should be operated in aso 10. verify the risks which might be caused by the malfunctions of external components. 11. connect the metallic plates on the back side of the lsi with their respecti ve potentials (agnd, pvin, lx). the thermal resistance and the electrical characteristics ar e guaranteed only when the meta llic plates are connected with their respective potentials.
request for your special attention and precautions in using the technical information and semiconductors described in this book (1) if any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. (2) the technical information described in this book is intended only to show the main characteristics and application circuit examples of the products. no license is granted in and to any intellectual property right or other right owned by panasonic corporation or any other company. therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information described in this book. (3) the products described in this book are intended to be used for general applications (such as office equipment, communications equipment, measuring instruments and household appliances), or for specific applications as expressly stated in this book. consult our sales staff in advance for information on the following applications: ? special applications (such as for airplanes, aerospace, automotive equipment, traffic signaling equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. it is to be understood that our company shall not be held responsible for any damage incurred as a result of or in connection with your using the products described in this book for any special application, unless our company agrees to your using the products in this book for any special application. (4) the products and product specifications described in this book are subject to change without notice for modification and/or im- provement. at the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date product standards in advance to make sure that the latest specifications satisfy your requirements. (5) when designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc.). especially, please be careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off and mode-switching. otherwise, we will not be liable for any defect which may arise later in your equipment. even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. (6) comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (esd, eos, thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. when using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages. (7) this book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our company. 20100202

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